The present invention relates to a chrominance signal processing apparatus for frequency converting a carrier chrominance signal in a television signal and, more particularly, to a chrominance signal processing apparatus for use in a VTR (Video Tape Recorder) which frequency-converts a carrier chrominance signal and then records or reproduces it.
An example of a chrominance signal processing apparatus for a VTR will be explained hereinbelow.
In known VTRs, a television signal is separated into a luminance signal and a carrier chrominance signal CH (whose carrier frequency is referred to as f.sub.CH); the luminance signal is converted to an FM signal; the carrier chrominance signal CH is frequency-converted to a carrier chrominance signal CL (whose carrier frequency is referred to as f.sub.CL) in a frequency band (about 700 Hz) lower than that of the FM signal; and both of these FM signal and carrier chrominance signal CL are mixed and then recorded. Upon reproduction, the FM signal and carrier chrominance signal CL are separated from the reproduced signal, the FM signal is demodulated to derive the luminance signal and the carrier chrominance signal CL is frequency-converted to obtain the carrier chrominance signal CH. Then both of these luminance signal and carrier chrominance signal CH are added and thereby reproducing the television signal.
FIG. 1 shows an arrangement diagram of a conventional chrominance signal processing apparatus, in which FIG. 1(a) denotes the recording system and FIG. 1(b) represents the reproducing system. In FIG. 1(a), reference numeral 1 denotes an input terminal of the carrier chrominance signal CH; 2 is an input terminal of the horizontal sync signal separated from the luminance signal to be recorded; 3 an APC (Automatic Phase Control); 4 an AFC (Automatic Frequency Control); 5 and 6 frequency converters; 7 an output terminal of the carrier chrominance signal CL; 8 an input terminal of the reproduced carrier chrominance signal CL; 9 an input terminal of the horizontal sync signal separated from the reproduced luminance signal; 10 a frequency converter; 11 an APC; and 12 an output terminal of the reproduced carrier chrominance signal CH.
The operation of the conventional chrominance signal processing apparatus constituted as described above will be described hereinbelow.
Upon recording, the APC 3 is one kind of PLL (Phase Locked Loop) and outputs an amplitude signal of the frequency f.sub.CH whose phase is synchronized with the burst of the carrier chrominance signal CH which is inputted from the terminal 1. The AFC 4 is one kind of PLL and outputs an amplitude signal of the frequency k.multidot.f.sub.H =f.sub.CL (f.sub.CL is defined by this equation and k is a constant value which is represented by an integer ratio, for instance, k=433/4 in the 3/4 inch cassette VTR) which is proportional to the frequency f.sub.H of the horizontal sync signal that is inputted from the terminal 2. The frequency converter 5 receives two amplitude signals of the frequencies f.sub.CH and f.sub.CL from the APC 3 and AFC 4 and outputs an amplitude signal of the frequency of (f.sub.CH +f.sub.CL) or (f.sub.CH -f.sub.CL), namely, a frequency converting signal. The frequency converter 6 frequency-converts the carrier frequency of the carrier chrominance signal CH from the terminal 1 from f.sub.CH to f.sub.CL by means of the frequency converting signal thereby obtaining the carrier chrominance signal CL. This signal is outputted from the terminal 7. In the case of performing the duplication of video tapes or the like by way of the APC and AFC as well, the carrier frequency f.sub.CL of the converted carrier chrominance signal is accurately set to k.multidot.f.sub.H.
The reproducing operation will how be described. Since the reproduced signal has a time base variation, the frequency of the horizontal sync signal which is inputted from the terminal 9 has (f.sub.H +.DELTA.f.sub.H), i.e., variation component of .DELTA.f.sub.H ; thus the AFC 4 outputs an amplitude signal of the frequency of k(f.sub.H +.DELTA.f.sub.H) in keeping with a change in frequency of the horizontal sync signal. The frequency converter 5 receives the amplitude signal of the frequency f.sub.CH from the APC 11 and the amplitude signal from the AFC 4 and then outputs an amplitude signal of the frequency of (k(f.sub.H +.DELTA.f.sub.H)+f.sub.CH), namely, a frequency converting signal. Since the carrier chrominance signal CL which is inputted from the terminal 8 also has a time base variation, the carrier frequency can be represented by (f.sub.CL +.DELTA.f.sub.CL). In this case, (.DELTA.f.sub.H /f.sub.H)=(.DELTA.f.sub.CL /f.sub.CL) is satisfied due to a property of the time base variation and f.sub.CL =k.multidot.f.sub.H, so that the frequency of the frequency converting signal becomes (f.sub.CH +f.sub.CL +.DELTA.f.sub.CL). Therefore, the frequency converter 10 derives the carrier chrominance signal CH of the frequency f.sub.CH by eliminating the frequency variation component from the carrier frequency (f.sub.CL +.DELTA.f.sub.CL) of the carrier chrominance signal CL from the terminal 8 by the frequency converting signal and then outputs this carrier chrominance signal CH from the terminal 12. The APC 11 compares the phase of the amplitude signal of the fixed frequency f.sub.CH provided therein with the phase of the burst signal in the carrier chrominance signal CH from the frequency converter 10 and operates to reduce the residual phase difference of the carrier chrominance signal.
As described above, the conventional chrominance signal processing apparatus obtains the amplitude signal of the frequency of nearly (f.sub.CH +f.sub.CL) or (f.sub.CH -f.sub.CL), i.e., the frequency converting signal by the frequency converter 5 which receives the amplitude signal of the frequency f.sub.CH and amplitude signal of the frequency f.sub.CL.
However, two frequency converters each having a filter therein that are difficult to be constituted as an IC (integrated circuit) are needed, and the arrangement is complicated. Therefore, there is a problem such that a further miniaturization of the apparatus and a reduction in cost are difficult to obtain. On the other hand, there is a method whereby the miniaturization of the apparatus and the reduction in cost are realized by use of a digital signal processing technology which need not use parts such as capacitors, inductors or the like which cannot be constituted in an IC and which simplify integration for producing an IC. However, even by means of the digital signal processing technology, its filter needs a number of multipliers and adders each having a large circuit scale except for special cases; consequently, there is also a problem such that a production of such an IC becomes difficult in terms of the circuit scale.